一种用于BDS-3接收机工程实现的两级B1C信号捕获技术

北斗三号卫星导航系统(BDS-3)B1C信号相较北斗二号卫星导航系统卫星信号,从信号结构、编码方式再到导航电文结构都发生了改变,包括引入导频信号、二次编码、BOC调制、LDPC编码和B-CNAV1导航电文结构等.这些改变一方面提高了信号性能(如抗多路径、信号捕获和跟踪精度等);另一方面,也带来了一系列问题,对接收机的信号捕获技术提出了全新的要求,如需处理更大的数据流,解决由二次编码带来的符号翻转和BOC调制造成的捕获多峰性问题.针对BDS-3接收机的工程实现,本文提出了一种新颖有效的两级B1C信号捕获技术.其中第一阶段采用扩展并行平均相关搜获结构,用以解决符号翻转问题,同时实现高效的信号粗捕获;第二阶段在缩小的搜索范围内进行高精度搜索,此步骤可有效避免信号多峰性造成的误锁可能.除此之外,本文还介绍了单信道和多信道组合式捕获技术,用户可根据资源占用和捕获灵敏度需求选取更有效的捕获方法.实验结果表明,本文提出的方法允许使用更小更经济的快速傅里叶变换(FFT)模块,并通过大量并行处理的方法实现快速捕获.相较传统的高精度捕获技术,此方法在采样频率超过50MHz时,能够在保证相近的捕获精度的同时减少至少61%的运算量.

A novel engineering implementation technique for acquiring B1C signal in the BeiDou-3 receiver

The modern signals of the Chinese BeiDou-3 navigation system bring new features compared to the previous civilian signals, such as longer spreading code, involving secondary code, new modulation technique (i.e. Binary Offset Carrier BOC), data／pilot channels and so on. These innovations are able to enhance the signal acquisition robustness, but they also require specific acquisition techniques to handle the large data stream, deal with the problem of sign transition and side peaks caused by the secondary code and the BOC modulation respectively. This paper proposes a novel two-stage acquisition technique for realizing efficient acquisition of the B1C signal in the engineering implementation of the modern receiver. The first stage employs an extended parallelized Averaging Correlation (AC) search structure, which can cope with the sign transition problem, to coarsely capture the signal with high efficiency. At the second stage, a fine-search process is completed within a reduced searching range to provide high precision result. The involving of the later stage aims to avoid the side peaks effect in the tracking stage that can easily cause a false lock. In addition, both of the single and channel combining acquisition techniques are introduced, which give designers an option of implementing the acquisition with higher sensitivity but more resources. The experiment results demonstrate that the proposed method allows to use much cheaper FFT blocks and enables fast acquisition by parallel process. The proposed method can reduce the number of multiplications by at least 61％ when the sampling frequency is over 50 MHz while providing quite similar acquisition precisions with the conventional method.