Feasibility analysis of baseband architectures for multi-GNSS receivers

GPS Solutions - Receiver design challenges arising from new GNSS signals include required intermediate frequency, sampling rate, modulation type, spreading code, and secondary code. Several...     

GNSS receiver implementations to mitigate the effects of commensurate sampling frequencies on DLL code tracking

The sampling frequency of a digitized intermediate frequency signal has a strong effect on the measurement accuracy of Global Navigation Satellite System (GNSS) receivers. The delay-locked loop tracking error is significant when the sampling frequency is an integer multiple of the code chipping rate, the so-called commensurate sampling frequency, and the number of distinct instantaneous residual code phases is low. This results in distortions of the correlation shape and discriminator functions that lead to a significant accuracy degradation. These effects are most pronounced when the sampling frequency is low. Notwithstanding, it is generally good for receivers to keep the sampling frequency to a minimum owing to the processing load and power consumption. It creates a challenge for existing GNSS signal processing techniques. Random, sine and sawtooth jitters have been found to mitigate these distortions considerably. A software algorithm and two hardware receiver implementations of these solutions are proposed. A register-based architecture can be directly applied to the conventional receiver architecture, while the increase in resource and power consumption is insignificant. A RAM-based design cannot only considerably minimize utilized resources but also slightly reduce the power consumption compared to the conventional architecture.