| 基于65-nm CMOS工艺的W波段两路电流合成型功率放大器的设计 |
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| 引用本文： | 黄占秋,张旭,赵晨曦,康凯.基于65-nm CMOS工艺的W波段两路电流合成型功率放大器的设计[J].南京气象学院学报,2021,13(4):425-430. |
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| 作者姓名： | 黄占秋 张旭 赵晨曦 康凯 |
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| 作者单位： | 电子科技大学 电子科学与工程学院, 成都, 611731,电子科技大学 电子科学与工程学院, 成都, 611731,电子科技大学 电子科学与工程学院, 成都, 611731,电子科技大学 电子科学与工程学院, 成都, 611731 |
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| 基金项目： | 国家自然科学基金（61931007，62025106）；国家重点研发计划（2020YFB1805003） |
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| 摘 要： | 采用三级差分共源结构设计了一种基于65-nm CMOS工艺的W波段功率放大器，并利用两路电流型功率合成结构进行功率合成以提升输出功率.为了同时实现单差分转换、阻抗匹配、直流供电，匹配网络采用变压器结构.仿真结果显示，在1 V的电源电压下，该功率放大器的小信号增益为12.7~15.7 dB，3-dB带宽为84~104 GHz，饱和输出功率为14.6 dBm，峰值功率附加效率为9.7%.该功率放大器具有良好的大信号性能，且芯片的核心面积仅为0.115 mm2.
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| 关 键 词： | CMOS工艺 功率放大器 功率合成 W波段 |
| 收稿时间： | 2021/1/13 0:00:00 |
Design of a W-band two-way current-combining power amplifier in 65-nm CMOS |
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| HUANG Zhanqiu,ZHANG Xu,ZHAO Chenxi and KANG Kai.Design of a W-band two-way current-combining power amplifier in 65-nm CMOS[J].Journal of Nanjing Institute of Meteorology,2021,13(4):425-430. |
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| Authors: | HUANG Zhanqiu ZHANG Xu ZHAO Chenxi and KANG Kai |
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| Institution: | School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731,School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731,School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731 and School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731 |
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| Abstract: | A three-stage differential common source structure is used to design a W-band power amplifier based on 65-nm CMOS technology, and two way current-mode power combining structures are used for power combining to increase output power.In order to achieve single-ended to differential conversion, impedance matching, and DC power supply at the same time, the matching network adopts a transformer structure.The simulation results show that under a supply voltage of 1 V, the power amplifier has a small signal gain of 12.7 to 15.7 dB, a 3-dB bandwidth of 84 to 104 GHz, a saturated output power of 14.6 dBm, and a peak power added efficiency of 9.7%.The power amplifier has good large signal performance, and the core area of the chip is only 0.115 mm2. |
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| Keywords: | CMOS power amplifier (PA) power combining W-band |
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