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| 一种提高含边界扫描器件电路板在线测试速度的新方法 | |
| 引用本文： | 李欣,廖为民,张玉虹.一种提高含边界扫描器件电路板在线测试速度的新方法[J].中国海洋大学学报(自然科学版),2003,33(1):115-121. |
| 作者姓名： | 李欣 廖为民 张玉虹 |
| 作者单位： | 1. 中国海洋大学电子工程系,青岛,266071 2. 中国海洋大学电子工程系,青岛,266071;青岛朗讯科技通讯设备有限公司,青岛,266101 3. 青岛大学机电学院,青岛,266071 |
| 摘 要： | 在包含有边界扫描器件的电路板在线测试 (In Circuit Test,ICT)中 ,采用边界扫描技术可以简化高密度集成电路的测试矢量生成。但如何在 ICT中减少边界扫描测试矢量从而提高测试速度 ,是 1个重要问题。本文结合 1个实例 ,讨论在 ICT中 ,采用伪穷举法与 Delta Scan法相结合 ,在保证原错误覆盖率不变的情况下减少测试矢量数 ,增加测试速度的方法。 |
| 关 键 词： | 边界扫描 电路板 元件 在线测试 测试矢量 |
| 文章编号： | 1001-1862(2003)01-115-07 |
| 修稿时间： | 2002年5月22日 |
A Method to Speed up Boundary Scan Test Embeded in ICT |
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| Li Xin Liao Weimin , Zhang Yuhong.A Method to Speed up Boundary Scan Test Embeded in ICT[J].Periodical of Ocean University of China,2003,33(1):115-121. | |
| Authors: | Li Xin Liao Weimin Zhang Yuhong |
| Institution: | Li Xin1 Liao Weimin 1,2 Zhang Yuhong3 |
| Abstract: | The increase of IC density has challenged test vector development and impacted on test speed. This paper presents a method to ease ICT test vector creation and reduce the vectors for boundary scan (BS) test through an example, thus attaining the goal of speeding up the test. On the basis of analysing the BS circuit mechanism and presenting the test vector creation methods, this paper introduces a Pseudo Exhaustive Testing idea to create the test vector, and then expounds how to further reduce the vectors for BS test. DeltaScan was brought into the test in which DeltaScan is accountable for short and open test of the BS device, so that the vector base for BS can be eliminated. These efforts result in a large-scale reduction of the vectors for BS test, which well satisfies the manufacturing requirements in ICT. |
| Keywords: | boundary scan circuit pack component in-circuit test vector |
| 本文献已被 CNKI 万方数据 等数据库收录！ | |