An analytical threshold voltage model for dual-strained channel PMOSFET

Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si_1-xGe_x/relaxd Si_1-yGe_y(s-Si/s-SiGe/Si_1-yGe_y) metal--oxide--semiconductor field-effect transistor (PMOSFET), analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si), because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si_1-yGe_y metal-oxide-semiconductor field-effect transistor (MOSFET) designs.     

应变Si电子电导有效质量模型

采用K \5P微扰法建立了应变Si导带能谷由纵、横向有效质量表征的E-k关系,并在此基础上,研究分析了(001),(101),(111)晶面应变Si电子的电导有效质量与应力、能谷分裂能及晶向的关系.结果表明,弛豫Si_1-xGe_x材料(001)面生长的应变Si沿[100],[010]晶向的电子电导有效质量和弛豫Si_1-xGe_x材料(101)面生长的应变